The present invention relates to a film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument, and particularly to chip size package (CSP) fabrication technology and mounting technology for CSP.
There is no formal definition of chip size/scale package (CSP), but generally this refers to an IC package in which the package size is the same as or only very slightly larger than the chip size. The development of CSP technology is very important for improving packaging density.
CSP differs from a quad flat package (QFP) having outer leads only around the periphery of the package, in having external connection terminals arranged in a plane, and capable of being surface mounted. More specifically, a conventional CSP comprises a polyimide substrate on which wiring is formed, external connection terminals formed on this wiring, and a semiconductor chip attached on the surface of the polyimide substrate opposite to that on which the external connection terminals are formed, and the wiring is connected to the electrodes of the semiconductor chip. Moreover, solder resist is applied to the surface of the wiring, and oxidation of the wiring is prevented.
When solder resist adheres not only to the wiring but also to the external connection terminals, during mounting bad electrical connections occur. Because of this, solder resist adhering to the external connection terminals must be removed, or the solder resist must be applied to avoid the external connection terminals, complicating the process.
The present invention seeks to solve the above mentioned problems, and has as its object the provision of a film carrier tape, semiconductor assembly, semiconductor device, and method of manufacturing the same, mounted board, and electronic instrument to which CSP technology is applied, but in which the application of solder resist to the surface is avoided.
The film carrier tape of the present invention comprises:
a substrate material having flexible and insulating properties; and
a wiring pattern formed on one of sides of the substrate material, the wiring pattern including a plurality of leads connected to a semiconductor element and a pad integrally formed with each of the leads for an external connection terminal formed thereon, each of the leads being adhered to the substrate material on a whole surface facing the substrate material, and the substrate material having an opening at a position corresponding to the pad for forming the external connection terminal.
According to the present invention, since an opening is provided beforehand, external connection terminals can be provided on the surface opposite to that on which the wiring pattern is formed, connected to the wiring pattern through the opening. Therefore, it is not necessary to apply solder resist to the wiring pattern while avoiding external connection terminals. Moreover, if a semiconductor element is disposed on the surface on which the wiring pattern is formed, the wiring pattern is not exposed, and therefore the application of a solder resist can be omitted.
In this way, a semiconductor element is disposed on the surface of the substrate material on which the wiring pattern is formed, and a structure for connection to the mounted board is provided on the opposite surface, and thereby an ultracompact semiconductor device can be obtained.
The opening is formed to correspond to the pads, and therefore the pads are independent of the substrate material. Therefore, the incidence of stress between the pads and the substrate material can be reduced.
In the present invention, the connection portion with the semiconductor element by the leads, being the most important, is adhered to the substrate material. Therefore, from the time when the film carrier tape is fabricated until the subsequent processes (semiconductor assembly fabrication, semiconductor device fabrication), that is to say, after the time of pattern formation, if a lead is subjected to an external load, it is supported by the substrate material and bending of the leads can be prevented. There is therefore the advantage that the positioning of the leads and the bonding pads of the semiconductor element can be carried out accurately. In particular, in an embodiment in which very fine processing technology is required, such as CSP, the larger the free region of the leads the more likely bending is to occur, but if as in the present invention the connection portion of the leads is adhered to the substrate material, handling is made easier.
Furthermore, in the present invention, the wiring pattern including the leads is formed on the surface of the substrate material, and part of the leads forms a connection portion with the semiconductor element. Therefore, the region other than the connection portion of the leads is also formed on the surface of the substrate material, so that compared with the structure in which the connection portion only is a separate member, it is possible to apply thermal stress and the like evenly, and an improvement in the reliability of the connection portion can be achieved.
In the present invention, since a semiconductor element is connected to part of the wiring pattern formed on the substrate material, the ingress of moisture can be prevented, compared to the case in which the semiconductor element is connected to the wiring pattern by a separate member and filled with resin. In particular, for a CSP, since the package is close to the electrodes, the present invention is efficacious.
The film carrier tape may further comprise projections formed on the wiring pattern on the substrate material, of the same material as the wiring pattern and used for connection to the semiconductor element.
Through the projections formed on the wiring pattern on the substrate material, an electrical connection between the electrodes formed on the semiconductor element and the wiring pattern can be obtained, and as far as possible a conventional TAB (Tape Automated Bonding) production line and existing technology can be used, enabling the burden of equipment and the burden of the development of special technology to be lightened.
Since the projections and wiring pattern are formed of the same material, the coefficient of thermal expansion is the same, and when a thermal stress is applied to them, no thermal stress occurs between them, and therefore the film carrier tape and a semiconductor assembly or semiconductor device formed using the same can have its thermal reliability improved. Since the oxidation-reduction potential is the same, even if humidity stress is applied, no local cells form, and therefore the reliability with respect to humidity can also be improved.
The film carrier tape of the present invention comprises:
a substrate material;
a wiring pattern formed on one of sides of the substrate material; and
a stress relieving portion provided on the one of sides of the substrate material, in a region corresponding to a position for forming at least an external connection terminal and avoiding a connection portion of the wiring pattern for connection to a semiconductor element.
In this film carrier tape, a conductive resin may be provided at least on the connection portion. By means of this conductive resin, the electrical connection with the semiconductor element is achieved.
In particular, it is preferably a film carrier tape such that the connection portion is of convex form.
The semiconductor assembly of the present invention comprises:
a substrate material having flexible and insulating properties;
a wiring pattern formed in adherence with one of sides of the substrate material;
a plurality of semiconductor elements disposed on a surface of the substrate material on which the wiring pattern is formed;
a connection portion forming part of the wiring pattern, electrically connected to each of the semiconductor elements, and adhered to the substrate material;
a plurality of pads forming part of the wiring pattern, each of the pads being provided for forming an external connection terminal thereon; and
a portion of the substrate material defining an opening corresponding to each of the pads.
By means of this structure, there is the benefit that a semiconductor assembly can be obtained such that as far as possible a conventional TAB (Tape Automated Bonding) production line and existing technology can be used, enabling the burden of equipment and the burden of the development of special technology to be lightened.
Furthermore, the connection portion to the semiconductor element which is most important is not within a hole, but can be formed on the substrate material, for which reason there is the benefit that a semiconductor assembly can be obtained such that during semiconductor assembly fabrication, even if an external load is applied to the wiring pattern, bending thereof can be prevented. Therefore, there is the benefit that a semiconductor assembly can be obtained such that positioning of the wiring pattern and semiconductor element is carried out accurately.
On at least either of electrodes of the semiconductor element and the wiring pattern, projections may be formed opposing the other thereof.
These projections may be formed on the wiring pattern.
By means of this structure, bumps are not required on the semiconductor element, and therefore a semiconductor element having general-purpose aluminum electrodes can be used. As a result of this, any semiconductor element from any manufacturer can be adopted, and the number of different semiconductor elements to which application is possible is increased.
These projections may be formed on the electrodes of the semiconductor element.
By means of this structure, in the case where a semiconductor element having bumps (projections) of solder or gold on the electrodes can be selected, the formation of projections on the film carrier tape used is not required. Therefore, since a normal TAB film carrier tape (film carrier tape with finger leads only, without projections formed) used conventionally can be used, there is the benefit that the number of different types of film carrier tape which can be used is increased.
The semiconductor assembly may further comprise an insulating resin between the semiconductor elements and the substrate material facing the semiconductor elements.
By means of this structure, the surface of active elements of the semiconductor element is covered by the insulating resin, and therefore moisture does not accumulate on the surface of active elements, so that there is the benefit that the reliability of the semiconductor device with respect to humidity is improved.
Furthermore, by means of the insulating resin between the semiconductor element and substrate material, when the wiring pattern is formed on the substrate material, since this location is also covered by the insulating resin, moisture does not accumulate, so that there is the benefit that the reliability of the semiconductor device with respect to humidity is improved.
Projections may be formed on at least either of electrodes of the semiconductor elements and the wiring pattern in such a manner as to face the other thereof; and the insulating resin may include conductive particles at least between the electrodes of the semiconductor elements and the connection portion.
By means of this structure, the interval between the semiconductor element electrodes and the wiring pattern, which is required to be electrically conducting, includes conductive particles. As a result of this, even if there are surface irregularities, the conductive particles absorb these irregularities to provide a stable electrical conduction, and therefore there is the benefit that the electrical conductivity reliability between the electrodes and the wiring pattern is improved.
The insulating resin may be an anisotropic conducting film or an anisotropic conducting adhesive.
By means of this structure, between the semiconductor element electrodes and the wiring pattern, to which electrically conductivity is required to be imparted, conductive particles dispersed in an anisotropic conductive film or anisotropic conductive adhesive are pressed. Thus stable conduction is effected in this portion only, and in other portions as for the anisotropic conductive film or anisotropic conductive adhesive, the conductive particles are not pressed. Therefore, the anisotropic conductive film or anisotropic conductive adhesive functions as a stable insulating adhesive, and the effect is the same as of the surface of active elements of the semiconductor element being covered by an insulating resin. Moisture does not accumulate on the surface of active elements, so that the reliability of the semiconductor device with respect to humidity is improved.
Furthermore, by means of the anisotropic conductive film or anisotropic conductive adhesive equivalent to an insulating resin between the semiconductor element and the substrate material, moisture does not accumulate on the wiring pattern, so that there is the benefit that reliability of the semiconductor device with respect to humidity is improved.
By means of this structure, the fact that the above effects can be obtained simultaneously and simply, is a benefit of great excellence.
The semiconductor device of the present invention comprises:
a substrate material having flexible and insulating properties;
a wiring pattern formed in adherence with one of sides of the substrate material;
a semiconductor element disposed on a surface of the substrate material on which the wiring pattern is formed;
a connection portion forming part of the wiring pattern, electrically connected to the semiconductor element, and adhered to the substrate material;
a plurality of pads forming part of the wiring pattern;
a portion of the substrate material defining an opening corresponding to each of the pads; and
an external connection terminal projecting on a surface of the substrate material opposite to the surface on which the semiconductor element is disposed, the external connection terminal being connected to each of the pads through the opening.
By means of this structure, using the above described semiconductor assembly, an opening is formed in the substrate material underneath the wiring pattern, and through the opening, the external connection terminals are connected to the wiring pattern. The external connection terminals project from the surface of the substrate material opposite to that on which the semiconductor element is disposed. In this way, a semiconductor device having an area approximately equal to that of the active surface of the semiconductor element can be obtained immediately beneath the active surface of the semiconductor element.
On at least one of the wiring pattern and the electrodes, projections may be formed in such a manner as to face the other thereof.
By means of this structure, electrical connection of the wiring pattern and electrodes is achieved by the projections.
If the external connection terminals are formed of solder, mounting in a single operation on a main board, referred to as a motherboard, is possible together with SMDs (surface mounted devices) other than that of the present invention by SMT (surface mounting technology), and there is the excellent benefit that with respect to the mounting of the semiconductor device, no special mounting equipment is required to be invested in.
The semiconductor device of the present invention comprises:
a substrate material having a wiring pattern formed on one of surfaces of the substrate material, and external connection terminals formed on another surface of the substrate material; and
a semiconductor element having electrodes on one of surfaces of the semiconductor element, the one of surfaces of the substrate material and the one of surfaces of the semiconductor element facing each other with a certain spacing therebetween, the wiring pattern and the electrodes being connected through a conductive resin, and a stress relieving portion being provided between the substrate material and the semiconductor element in a region avoiding the electrodes.
Since the wiring pattern and electrodes are connected by a conductive resin, special jigs and mechanical equipment are not required. Between the substrate material and the semiconductor element, a stress relieving portion is provided, and therefore stress applied to the external connection terminals can be relieved. That is to say, when this semiconductor device is for example mounted on a circuit board, if the temperature changes, a stress occurs because of the difference between the coefficient of thermal expansion of the circuit board and the coefficient of thermal expansion of the substrate material, tending to tilt the external connection terminals, but this stress can be absorbed by the stress relieving portion. In this way, the crack resistance of the external connection terminals can be improved.
The stress relieving portion may be provided only in a region corresponding to the external connection terminals and the vicinity thereof.
The stress relieving portion serves to relieve stress applied to the external connection terminals, and therefore even if only provided in a region corresponding to the external connection terminals and the vicinity thereof, is able to function.
The semiconductor device of the present invention comprises:
a substrate material having a wiring pattern formed on one of surfaces of the substrate material, and external connection terminals formed on another surface of the substrate material, the substrate material also having a hole in a region for forming each of the external connection terminals, the wiring pattern having a three-dimensionally bent portion entering the hole, and each of the external connection terminals being formed on the three-dimensionally bent portion;
a semiconductor element facing the one of surfaces of the substrate material and having electrodes which are connected to the wiring pattern; and
an adhesion layer between the substrate material and the semiconductor element.
Three-dimensionally bent portions are constructed so as to be able to be deformed into the holes, and by this structure stress applied to the external connection terminals can be absorbed.
The semiconductor device of the present invention comprises:
a substrate material having a wiring pattern formed on one of surfaces of the substrate material, and external connection terminals formed on another surface of the substrate material, the wiring pattern having a plane bent portion bent along the surfaces of the substrate material;
a semiconductor element facing the one of surfaces of the substrate material and having electrodes connected to the wiring pattern; and
an adhesion layer between the substrate material and the semiconductor element.
By means of the plane bent portions, stress applied to the external connection terminals can be absorbed.
The substrate material may have a hole in a region corresponding to the plane bent portions. In this way, the plane bent portions are more easily deformed into the holes, and the stress absorption is improved.
The wiring pattern may have projections, and the projections and the electrodes may be connected through the conductive resin.
In this way, by the connection of the projections to the electrodes, with a certain spacing between the substrate material and the semiconductor element, a stress relieving portion can be formed.
The conductive resin may be an anisotropic conducting film, and may be applied in planar form between the substrate material and the semiconductor element; and conductive particles included in the anisotropic conducting film may be pressed between the projections and the electrodes to achieve conduction.
The anisotropic conductive film comprises a resin in sheet form with a conductive filler dispersed therein, and can be made conducting simply by being pressed.
The conductive resin may be provided only in a region corresponding to the projections and the electrodes and the vicinity thereof.
This conductive resin serves to provide conduction between the projections and the electrodes, and by being used only in the minimum required quantity allows the materials cost to be kept low.
The semiconductor device of the present invention comprises:
a substrate material having a wiring pattern formed on one of sides of the substrate material, and external connection terminals projecting from another side of the substrate material;
a stress relieving portion provided on the one of sides of the substrate material;
a semiconductor element provided in a position to sandwich with the substrate material the stress relieving portion; and
a wire electrically connecting the wiring pattern and the semiconductor element.
Since the wiring pattern is provided on the opposite side to the external connection terminals, the wiring pattern is not exposed to the exterior. The relieving of stress is achieved by the stress relieving layer.
The substrate material may have a hole in a region for forming each of the external connection terminals, the wiring pattern may have a three-dimensionally bent portion entering the hole, and each of the external connection terminals may be formed on the three-dimensionally bent portion.
By means of this, stress relief by the three-dimensionally bent portions can be even more so achieved.
The method of making a film carrier tape of the present invention comprises:
a step of providing a metal forming a wiring pattern on a substrate material having flexible and insulating properties;
a step of forming the wiring pattern from the metal, including a plurality of leads; and
a step of forming a separate opening in the substrate material in at least a portion of a region overlapping each of the leads.
According to this method, there is no difficult step of handling the tape with the unhardened adhesive attached, but the tape is handled after the hardening of the adhesive is completed and after the metal comprising the wiring pattern has been attached. Therefore, to a degree, rough handling can be used, and the process is not limited, so that there is the benefit that the process freedom of the process forming holes is increased.
In this way, the above described film carrier tape can be fabricated.
In the method of making a film carrier tape, the step of forming the wiring pattern may include a step of half etching the wiring pattern excluding at least a part of the leads.
If the portion of the wiring pattern excluding a part of the wiring pattern over the substrate material is subjected to half etching, the excluded part remains as projections. In this way, in a single operation, there is the benefit that projections can be easily formed on the wiring pattern.
The method of making a film carrier tape may further comprise a step of gold-plating the projections after the half etching step.
According to this method, at the time of bonding with the bonding pads (aluminum electrodes) formed on the semiconductor element, the gold plating formed on the projections can act as a gold supply material for the gold-aluminum alloy which is the bonding material without providing a bonding material. Therefore, there is the effect that the subsequent bonding process is greatly simplified.
The method of making a semiconductor assembly of the present invention comprises:
a step of preparing a film carrier tape, the film carrier tape comprising a substrate material and a wiring pattern formed on one of sides of the substrate material, the wiring pattern comprising a plurality of leads connected to a semiconductor element and a pad having an external connection terminal and formed integrally with each of the leads, a connection portion of each of the leads with the semiconductor element being adhered to the substrate material to be supported, and the substrate material having an opening for forming the external connection terminal at a position corresponding to the pad;
a step of positioning electrodes of the semiconductor element in a mounting region of the wiring pattern on a surface of the substrate material on which the wiring pattern is formed; and
a step of electrically connecting the wiring pattern and the electrodes.
According to this method, there is the benefit that a method of obtaining a semiconductor assembly can be obtained such that as far as possible a conventional TAB (Tape Automated Bonding) production line and existing technology can be used, enabling the burden of equipment and the burden of the development of special technology to be lightened.
Furthermore, the connection portion with the semiconductor element by the leads, being the most important, is not within a hole, but can be formed on the substrate material, for which reason there is the benefit that a semiconductor assembly can be obtained such that during semiconductor assembly fabrication, even if an external load is applied to the leads, bending of the leads can be prevented. Therefore, there is the benefit that a method of obtaining a semiconductor assembly can be obtained such that positioning of the leads and the bonding pads of the semiconductor element is carried out accurately.
Projections may be formed on at least one of the wiring pattern and the electrodes in such a manner as to face the other thereof; and the step of electrical connection may be achieved by the application of ultrasound from the side of the wiring pattern of the side of the semiconductor element to the projections.
For example, if ultrasound is used for bonding the wiring pattern and electrodes, the damage to the semiconductor element and substrate material by heat and pressure can be very greatly reduced. In this way, a semiconductor assembly of high reliability can be fabricated.
Before the step of electrical connection, an insulating resin may be provided between the wiring pattern and the semiconductor element facing the wiring pattern; and after the step of electrical connection, the insulating resin may be hardened.
According to this method, since an insulating resin can be provided beforehand by a method such as painting or printing on the opposing surfaces of the film carrier tape and semiconductor element, an optimum insulating resin and an optimum application method can be selected. Then there is the effect that the effect according to the objective (for example, putting emphasis on reliability or putting emphasis on reducing cost) can be selected beforehand.
After the step of electrical connection, an insulating resin may be injected and hardened between the wiring pattern and the semiconductor element facing the wiring pattern.
According to this method, it is possible to adopt the same process as in conventional orthodox flip-chip mounting. Therefore, where the processing equipment for flip-chip mounting is already installed, no new investment in equipment is required.
The step of electrical connection may be achieved by the application of heat and pressure between the wiring pattern and the electrodes from the side of the wiring pattern or the side of the semiconductor element.
According to this method, the process of electrical connection is almost the same as the process in conventional TAB mounting. Therefore, where the processing equipment for TAB mounting is already installed, no new investment in equipment is required.
An insulating resin may be provided between the wiring pattern and the semiconductor element facing the wiring pattern before the step of electrical connection; and the insulating resin present between the wiring pattern and the semiconductor element may be hardened simultaneously with the electrical connection by the step of electrical connection.
According to this method, by the process of electrical connection, the insulating resin is simultaneously hardened, and therefore a separate step for hardening the insulating resin is not required. Therefore, by reduction of the number of steps, the ease of fabrication is improved, and the semiconductor assembly cost can be reduced.
The method of making a semiconductor device of the present invention comprises:
a step of preparing a film carrier tape, the film carrier tape comprising a substrate material and a wiring pattern formed on one of sides of the substrate material, the wiring pattern comprising a plurality of leads connected to a semiconductor element and a pad having an external connection terminal and formed integrally with each of the leads, a connection portion of each of the leads with the semiconductor element being adhered to the substrate material to be supported, and the substrate material having an opening for forming the external connection terminal at a position corresponding to the pad;
a step of positioning electrodes of the semiconductor element in a mounting region of the wiring pattern on a surface of the substrate material on which the wiring pattern is formed;
a step of electrically connecting the wiring pattern and the electrodes;
a step of providing a conducting material in the opening; and
a step of stamping out the film carrier tape into a piece.
Since there is a step of providing a conducting material within an opening provided in the substrate material underneath the wiring pattern, a method is obtained of fabricating a semiconductor device having an area approximately equal to that of the active surface of the semiconductor element, directly below the active surface of the semiconductor element.
The step of providing the conducting material may be a step in which flux is applied to the opening, solder balls are disposed on the opening, and heat is applied.
According to this method, after applying flux to the opening, solder balls are disposed, and heat is applied, as a result of which external connection terminals of stable diameter can be formed. This is linked to increasing the stability of the external form of the semiconductor device, and results in a method of fabricating a semiconductor device of high reliability.
The step of providing the conducting material may be a step in which solder cream is applied to the opening, and then heat is applied.
According to this method, since after applying solder cream to the opening, heat is applied, by comparison with solder balls, inexpensive solder cream can be used, resulting in an inexpensive method of fabricating a semiconductor device.
Projections may be formed on at least one of the wiring pattern and the electrodes in such a manner as to face the other thereof; and the step of electrical connection may be achieved by the application of ultrasound to the projections from the side of the wiring pattern or the side of the semiconductor element.
For example, if ultrasound is used for bonding the wiring pattern and electrodes, the damage to the semiconductor element and substrate material by heat and pressure can be very greatly reduced. In this way, a semiconductor assembly of high reliability can be fabricated.
The mounted board of the present invention has mounted the above described semiconductor device.
By means of this structure, a board with a chip size package (CSP) semiconductor device mounted at high density is obtained, and even further compactness of a board with electronic components mounted can be achieved.
The electronic instrument of the present invention incorporates the above described mounted board.
By means of this structure, a board with a chip size package (CSP) semiconductor device mounted at high density is incorporated, and particularly for a portable electronic instrument or the like, an ultracompact lightweight result is achieved.
The method of making a semiconductor device of the present invention comprises:
a step of forming a wiring pattern on a substrate material having holes, the wiring pattern passing over the holes;
a step of opposing the wiring pattern formed on the substrate material to electrodes of a semiconductor element with a certain spacing therebetween, and connecting the wiring pattern and the electrodes through a conductive resin;
a step of injecting a resin between the substrate material and the semiconductor element, in a region avoiding the electrodes, to form a stress relieving portion; and
a step of forming external connection terminals on the opposite surface of the substrate material from the wiring pattern, connected through the holes to the wiring pattern.
By means of the conductive resin, the facing wiring pattern and electrodes are connected, resin is injected, and a stress relieving portion is formed.
The method of making a semiconductor device of the present invention comprises:
a step of forming a wiring pattern on a substrate material having holes, the wiring pattern passing over the holes;
a step of providing a resin in regions corresponding to the holes and the vicinity thereof only, forming a stress relieving portion on the wiring pattern;
a step of providing a conductive resin on a portion of the wiring pattern;
a step of connecting the wiring pattern and electrodes of the semiconductor element through the conductive resin, with the stress relieving portion interposed between the wiring pattern and the semiconductor element; and
a step of forming external connection terminals on the opposite surface of the substrate material from the wiring pattern, connected through the holes to the wiring pattern.
Since the stress relieving portion is formed only in the region of the external connection terminals and the vicinity thereof, the materials used can be kept to a minimum.
The conductive resin may be provided only in a region of the connection of the wiring pattern and the electrodes and the vicinity thereof.
Since the conductive resin is used to connect the wiring pattern and electrodes, by providing it only in the region where it is required, waste of materials can be avoided.
The method of making a semiconductor device of the present invention comprises:
a step of forming a wiring pattern on a substrate material having holes, the wiring pattern passing over the holes;
a step of bending the wiring pattern into the holes;
a step of opposing the wiring pattern formed on the substrate material to electrodes of a semiconductor element with a certain spacing therebetween, and connecting the wiring pattern and the electrodes through a conductive resin; and
a step of forming external connection terminals on the opposite surface of the substrate material from the wiring pattern, connected through the holes to the wiring pattern.
Since the wiring pattern is subjected to bending processing so as to enter the holes, and since the external connection terminals are formed on these bent portions, stress applied to the external connection terminals can be absorbed by these bent portions.
The method of making a semiconductor device may further comprise a step of forming projections on the wiring pattern for connection to the electrodes of the semiconductor element.
By using these projections to connect to the electrodes, between the substrate material and the semiconductor element a gap for forming the stress relieving portion can be formed.
The conductive resin may be an anisotropic conducting film, and conducting particles included in the anisotropic conducting film may be pressed between the projections and the electrodes.
The anisotropic conductive film comprises a resin in sheet form with a conductive filler dispersed therein, and can be made conducting simply be being pressed.
The substrate material may be formed by cutting out a film carrier tape; the anisotropic conductive film may be in tape form and attached along the longitudinal direction of the film carrier tape; and the semiconductor element may be aligned and connected along the longitudinal direction of the film carrier tape.
By means of this, it is possible to attach the anisotropic conducting film along the longitudinal direction of the substrate material, and therefore the process can be automated. The semiconductor device can also be connected aligned along the longitudinal direction of the substrate material, and therefore waste of the anisotropic conductive film is reduced.
The circuit board of the present invention has the above described semiconductor device and a substrate on which a desired wiring pattern is formed; and external connection terminals of the semiconductor device are connected to the wiring pattern.
The electronic instrument of the present invention has the above described circuit board.